package hardcaml

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RTL Hardware Design in OCaml


Dune Dependency






Hardcaml is an embedded DSL for designing and simulating hardware in OCaml. Generic hardware designs are easily expressed using features such as higher order functions, lists, maps etc. A built in simulator allows designs to be simulated within Hardcaml. Designs are converted to either Verilog or VHDL to interact with standard back end tooling.

Published: 26 May 2024



Hardcaml is an OCaml library for designing and testing hardware designs.

  • Express hardware designs in OCaml

  • Make generic designs using higher order functions, lists, maps, functors...

  • Simulate designs in OCaml

  • Convert to (hierarchical) Verilog or VHDL

  • Write new modules to transform or analyse circuits, or provide new backends


$ opam install hardcaml ppx_hardcaml hardcaml_waveterm


Tools and libraries

  • Hardcaml_waveterm - ASCII based digital waveforms. Usable in expect tests or from an interactive terminal application.

  • Hardcaml_c - convert Hardcaml designs to C-based simulation models. Provides an API compatible with the standard Cyclesim module. Trades compilation time for runtime performance.

  • Hardcaml_verilator - Convert Hardcaml designs to very high speed simulation model using the open source Verilator compiler.

  • Hardcaml_step_testbench - Monadic testbench API. Control multiple tasks synchronized to a clock without converting to a statemachine coding style.

  • Hardcaml_circuits - A library of useful/interesting Hardcaml designs

  • Hardcaml_fixed_point - Fixed point arithmetic with rounding and overflow control

  • Hardcaml_xilinx - Various Xilinx primitives wrapped with Hardcaml interfaces and simulation models

  • Hardcaml_xilinx_components - Tool to read Xilinx unisim and xpm component definitions and generate Hardcaml interfaces

  • Hardcaml_of_verilog - Convert a verilog design to Hardcaml using Yosys

  • Hardcaml_verify - SAT based formal verification tools for Hardcaml

  • Hardcaml_xilinx_reports - Automated generation of synthesis reports from Vivado.

Projects using Hardcaml

Dependencies (10)

  1. zarith >= "1.11"
  2. ppxlib >= "0.28.0"
  3. dune >= "3.11.0"
  4. stdio >= "v0.17" & < "v0.18"
  5. ppx_sexp_conv >= "v0.17" & < "v0.18"
  6. ppx_jane >= "v0.17" & < "v0.18"
  7. core_kernel >= "v0.17" & < "v0.18"
  8. bin_prot >= "v0.17" & < "v0.18"
  9. base >= "v0.17" & < "v0.18"
  10. ocaml >= "5.1.0"

Dev Dependencies





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