package hardcaml

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type t =
  1. | Bit of Base.bool
  2. | Bit_vector of Logic.Bit_vector.t
  3. | Bool of Base.bool
  4. | Int of Base.int
  5. | Real of Base.float
  6. | Std_logic of Logic.Std_logic.t
  7. | Std_logic_vector of Logic.Std_logic_vector.t
  8. | Std_ulogic of Logic.Std_logic.t
  9. | Std_ulogic_vector of Logic.Std_logic_vector.t
  10. | String of Base.string
include Sexplib0.Sexpable.S with type t := t
val t_of_sexp : Sexplib0__.Sexp.t -> t
val sexp_of_t : t -> Sexplib0__.Sexp.t
val bit : Base.bool -> t
val bit_vector : Logic.Bit_vector.t -> t
val bool : Base.bool -> t
val int : Base.int -> t
val real : Base.float -> t
val std_logic : Logic.Std_logic.t -> t
val std_logic_vector : Logic.Std_logic_vector.t -> t
val std_ulogic : Logic.Std_logic.t -> t
val std_ulogic_vector : Logic.Std_logic_vector.t -> t
val string : Base.string -> t
val is_bit : t -> Base.bool
val is_bit_vector : t -> Base.bool
val is_bool : t -> Base.bool
val is_int : t -> Base.bool
val is_real : t -> Base.bool
val is_std_logic : t -> Base.bool
val is_std_logic_vector : t -> Base.bool
val is_std_ulogic : t -> Base.bool
val is_std_ulogic_vector : t -> Base.bool
val is_string : t -> Base.bool
val bit_val : t -> Base.bool Base.option
val bit_vector_val : t -> Logic.Bit_vector.t Base.option
val bool_val : t -> Base.bool Base.option
val int_val : t -> Base.int Base.option
val real_val : t -> Base.float Base.option
val std_logic_val : t -> Logic.Std_logic.t Base.option
val std_logic_vector_val : t -> Logic.Std_logic_vector.t Base.option
val std_ulogic_val : t -> Logic.Std_logic.t Base.option
val std_ulogic_vector_val : t -> Logic.Std_logic_vector.t Base.option
val string_val : t -> Base.string Base.option
module Variants : sig ... end
include Base.Equal.S with type t := t
val equal : t Base__Equal.equal
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