val maker_side : (t, Side.t) Fieldslib.Field.tval amount : (t, string) Fieldslib.Field.tval price : (t, string) Fieldslib.Field.tval tid : (t, int64) Fieldslib.Field.tval fold :
init:'acc__0 ->
tid:('acc__0 -> (t, int64) Fieldslib.Field.t -> 'acc__1) ->
price:('acc__1 -> (t, string) Fieldslib.Field.t -> 'acc__2) ->
amount:('acc__2 -> (t, string) Fieldslib.Field.t -> 'acc__3) ->
maker_side:('acc__3 -> (t, Side.t) Fieldslib.Field.t -> 'acc__4) ->
'acc__4val make_creator :
tid:
((t, int64) Fieldslib.Field.t -> 'acc__0 -> ('input__ -> int64) * 'acc__1) ->
price:
((t, string) Fieldslib.Field.t ->
'acc__1 ->
('input__ -> string) * 'acc__2) ->
amount:
((t, string) Fieldslib.Field.t ->
'acc__2 ->
('input__ -> string) * 'acc__3) ->
maker_side:
((t, Side.t) Fieldslib.Field.t ->
'acc__3 ->
('input__ -> Side.t) * 'acc__4) ->
'acc__0 ->
('input__ -> t) * 'acc__4val map :
tid:((t, int64) Fieldslib.Field.t -> int64) ->
price:((t, string) Fieldslib.Field.t -> string) ->
amount:((t, string) Fieldslib.Field.t -> string) ->
maker_side:((t, Side.t) Fieldslib.Field.t -> Side.t) ->
tval iter :
tid:((t, int64) Fieldslib.Field.t -> unit) ->
price:((t, string) Fieldslib.Field.t -> unit) ->
amount:((t, string) Fieldslib.Field.t -> unit) ->
maker_side:((t, Side.t) Fieldslib.Field.t -> unit) ->
unitval for_all :
tid:((t, int64) Fieldslib.Field.t -> bool) ->
price:((t, string) Fieldslib.Field.t -> bool) ->
amount:((t, string) Fieldslib.Field.t -> bool) ->
maker_side:((t, Side.t) Fieldslib.Field.t -> bool) ->
boolval exists :
tid:((t, int64) Fieldslib.Field.t -> bool) ->
price:((t, string) Fieldslib.Field.t -> bool) ->
amount:((t, string) Fieldslib.Field.t -> bool) ->
maker_side:((t, Side.t) Fieldslib.Field.t -> bool) ->
boolval to_list :
tid:((t, int64) Fieldslib.Field.t -> 'elem__) ->
price:((t, string) Fieldslib.Field.t -> 'elem__) ->
amount:((t, string) Fieldslib.Field.t -> 'elem__) ->
maker_side:((t, Side.t) Fieldslib.Field.t -> 'elem__) ->
'elem__ listval map_poly :
([< `Read | `Set_and_create ], t, 'x0) Fieldslib.Field.user ->
'x0 listmodule Direct : sig ... end