package hardcaml-llvmsim

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in-package search v0.2.0

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Library
Module
Module type
Parameter
Class
Class type

module Sc = HardCaml.Signal.Comb

module St = HardCaml.Signal.Types

type cyclesim =
  HardCaml.Bits.Ext.Comb.BigarraybitsNativeint.t HardCaml.Cyclesim.Api.cyclesim

val reset_value : St.signal -> Llvm.llvalue

val compile : int -> HardCaml.Circuit.t -> Llvm.llmodule

val make : 
  HardCaml.Circuit.t ->
  (HardCaml.Bits.Ext.Utils_ext.bani * int) HardCaml.Cyclesim.Api.cyclesim

val write : string -> HardCaml.Circuit.t -> unit

val load : 
  string ->
  (HardCaml.Bits.Ext.Utils_ext.bani * int) HardCaml.Cyclesim.Api.cyclesim

module Make (B : HardCaml.Bits.Ext.Comb.S) : sig ... end

module Gen
  (B : HardCaml.Bits.Ext.Comb.S)
  (I : HardCaml.Interface.S)
  (O : HardCaml.Interface.S) : 
  sig ... end