package hardcaml

  1. Overview
  2. Docs
Legend:
Library
Module
Module type
Parameter
Class
Class type

Simple circuit analsysis passes for common issues.

val verify_clock_pins : expected_clock_pins:Base.String.t Base.List.t -> Circuit.t -> Base.Unit.t

Raises if there exists a seqential element (register or memory) whose clock input pin is not in expected_clock_pins. Clocks are defined by the name of input clock signals into the circuit.

OCaml

Innovation. Community. Security.