Rewrite OCaml records for use as Hardcaml Interfaces

Description

An interface in Hardcaml is an OCaml record with special attributes including a bit width and RTL netlist name. Input and output ports of a hardware design can then be accessed through the OCaml record. This allows easier management of bundles of ports when working with the Simulator, Netlist generation or hierarchical designs.

Published: 21 Mar 2022

Dependencies (6)

  1. ppxlib >= "0.23.0"
  2. dune >= "2.0.0"
  3. ppx_jane >= "v0.15" & < "v0.16"
  4. hardcaml >= "v0.15" & < "v0.16"
  5. base >= "v0.15" & < "v0.16"
  6. ocaml >= "4.08.0"

Reverse Dependencies (7)

  1. hardcaml_c
  2. hardcaml_circuits
  3. hardcaml_of_verilog
  4. hardcaml_verify
  5. hardcaml_verilator
  6. hardcaml_waveterm >= "v0.15.0"
  7. hardcaml_xilinx

Conflicts

    None