package hardcaml_event_driven_sim

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Parameters

module Comb : Logic.S

Signature

type t
val processes : t -> Event_driven_sim.Simulator.Process.t list

Find the simulation signal associated with the given Hardcaml signal. Raises if the signal does not exist within the circuit.

Construct a fake simulation signal for the given Hardcaml signal.

val circuit_to_processes : ?delay:(Hardcaml.Signal.t -> int) -> ?external_insts: (Hardcaml.Signal.t -> inputs:Comb.t Event_driven_sim.Simulator.Signal.t list -> Comb.t Event_driven_sim.Simulator.Signal.t) -> Hardcaml.Circuit.t -> t

Compiles Hardcaml circuit into a Event_driven_sim process list. Returns the list and a mapping from Hardcaml signals into Event_driven_sim signals.

For every signal, delay should return the simulation time it takes to compute value for a given signal. Default is to have no delay.

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