package octez-libs

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package octez-libs
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Representation of bytes.

type bl = bool list

Little-endian representation of bytes. First element of the list is the Least Significant Bit.

val input_bytes : le:bool -> bytes -> bl Input.t

input_bytes ~le bs returns the representation of bs that Plompiler expects as input.

val constant : le:bool -> bytes -> bl repr t

constant ~le bs returns a value holding the bytes bs. le can be used to set the endianness.

val constant_uint32 : le:bool -> Stdint.uint32 -> bl repr t

constant_uint32 ~le n returns a value holding the bytes correspoding to the uint n. le can be used to set the endianness.

val length : bl repr -> int

length b returns the length of b in bits.

val concat : bl repr array -> bl repr

concat bs returns the concatenation of the bitlists in bs.

val add : ?ignore_carry:bool -> bl repr -> bl repr -> bl repr t

add b1 b2 computes the addition of b1 and b2.

val xor : bl repr -> bl repr -> bl repr t

xor b1 b2 computes the bitwise xor between b1 and b2.

val not : bl repr -> bl repr t

not b computes the bitwise negation of b.

val band : bl repr -> bl repr -> bl repr t

band b1 b2 computes the bitwise conjunction between b1 and b2.

val rotate_left : bl repr -> int -> bl repr t

rotate_left bl n shifts the bits left by n positions, so that each bit is more significant. The most significant bit becomes the least significant i.e. it is "rotated". rotate_left bl (length bl) = bl

val rotate_right : bl repr -> int -> bl repr t

rotate_right bl n shifts the bits right by n positions. Similar to rotate_left, but to the right.

val shift_left : bl repr -> int -> bl repr t

shift_left bl n shifts all bits left by n positions, so that each bit is more significant. The most signigicant bit is lost and the least significant bit is set to zero. More precisely, if we interpret the bl as an integer shift_left bl i = bl * 2^i mod 2^{length a}

val shift_right : bl repr -> int -> bl repr t

shift_right bl n shifts all bits right by n positions. Similar to shift_left, but to the right.

module Internal : sig ... end
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